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FPGA Senior Staff Engineer

Company: Accenture
Location: Phoenix
Posted on: January 16, 2021

Job Description:

Job DescriptionAs part of Accenture---s Industry X, the Silicon Design group is a diverse team of world class silicon engineers. We have 100 years of cumulative hands-on experience in architecture, logic design, verification, physical design, emulation and firmware. We use the latest silicon technologies and processes to help our clients create well-designed solutions to highly complex challenges. We are designing and developing next-generation, high performance SoCs, supporting our clients in their drive to deliver their product vision to their users. We are involved in all aspects of chip design from definition and architecture through to verification and signoff. Accenture engineers are true ---Silicon to SW--- Partners, allowing a new breed of companies in the semiconductor ecosystem to innovate in an unparalleled time to market. Whether at our Silicon Design Center in Phoenix or at one of our other locations you will get to collaborate and innovate with the world---s leading product development companies. In our dynamic fast-paced environment you will get to make the impossible possible. Accenture is invested in our team member---s growth and provide many opportunities for training and skills expansion. Job Description The FPGA Engineer will require: Hands on experience to write synthesizable RTL for FPGA based systems Integrating first-party and third-party IPs into a larger system and maintaining it through fast transitions Build vendor-neutral FPGA/RTL designs intended to prototype ASIC implementations Familiarity with Xilinx, Altera FPGA's((Vivado, Quartus, etc.) Perform FPGA design verification and validation using advanced RTL verification techniques Design FPGA---s through the life cycle including: Architecture development, micro architecture, algorithm implementation, synthesizable Verilog code generation Perform FPGA Design Implementation: Constraint driven FPGA Synthesis, place and route, static timing analysis and optimize FPGAs for timing closure Collaborate in a team environment across multiple engineering disciplines and with researchers Generate design review and deliverable documentation including review packages, block diagrams, interface control documents, test procedures, requirements verification matrices, and test plans/procedures Proficient in control and use of a variety of test equipment including Oscilloscopes, Spectrum Analyzers, and Signal Generators Qualifications Basic Qualifications BS or Masters in Electrical Engineering, Computer Engineering or related7 years of experience with FPGA/RTL design Preferred Skills Proficient in Verilog coding for synthesis Demonstrated ability to analyze and debug FPGA firmware and related hardware issues Solid technical writing skills and ability to communicate complex technical concepts/solutions both inside and outside of the organization. In depth working knowledge and experience with vendor specific FPGA tools (Vivado, Quartus, etc.) Circuit design experience in one or more of these areas: high speed differential circuits, microcontrollers, microprocessors, firmware, display engineering, digital signal processing, real-time image processing, camera modules, knowledge of CIS-2, MIPI C/D-PHY, I2C/I3C, and advanced interface standard Programming experience in C and/or C++ Experience using industry standard FPGA tools to bring up initial system, integrate peripheral components, and test and debug designProgramming experience in one or more scripting languages: Python, tcl, shell scripts, or equivalent EDA tool scripting languages Experience with agile RTL or HLS methodologies such as Vivado HLS, Catapult HLS, Chisel, PyMTL, Stratus HLS, or others Proven track record of successfully deploying FPGA solutions across production systems or research prototypes BOOT Linux OS on top of the platform (FPGA) Professional Skill Requirements Excellent interpersonal and communication skills Highly motivated, self-starter, who works well in team environments Applicants for employment in the US must have work authorization that does not now or in the future require sponsorship of a visa for employment authorization in the United States and with Accenture. Equal Employment Opportunity StatementAccenture is an Equal Opportunity Employer. We believe that no one should be discriminated against because of their differences, such as age, disability, ethnicity, gender, gender identity and expression, religion or sexual orientation. Our rich diversity makes us more innovative, more competitive and more creative, which helps us better serve our clients and our communities.All employment decisions shall be made without regard to age, race, creed, color, religion, sex, national origin, ancestry, disability status, veteran status, sexual orientation, gender identity or expression, genetic information, marital status, citizenship status or any other basis as protected by federal, state, or local law.Accenture is committed to providing veteran employment opportunities to our service men and women.For details, view a copy of the Accenture Equal Opportunity and Affirmative Action Policy StatementRequesting An AccommodationAccenture is committed to providing equal employment opportunities for persons with disabilities or religious observances, including reasonable accommodation when needed. If you are hired by Accenture and require accommodation to perform the essential functions of your role, you will be asked to participate in our reasonable accommodation process. Accommodations made to facilitate the recruiting process are not a guarantee of future or continued accommodations once hired.If you would like to be considered for employment opportunities with Accenture and have accommodation needs for a disability or religious observance, please call us toll free at 1 (877) 889-9009, send us an email or speak with your recruiter.Other Employment StatementsCandidates who are currently employed by a client of Accenture or an affiliated Accenture business may not be eligible for consideration.Job candidates will not be obligated to disclose sealed or expunged records of conviction or arrest as part of the hiring process.The Company will not discharge or in any other manner discriminate against employees or applicants because they have inquired about, discussed, or disclosed their own pay or the pay of another employee or applicant. Additionally, employees who have access to the compensation information of other employees or applicants as a part of their essential job functions cannot disclose the pay of other employees or applicants to individuals who do not otherwise have access to compensation information, unless the disclosure is (a) in response to a formal complaint or charge, (b) in furtherance of an investigation, proceeding, hearing, or action, including an investigation conducted by the employer, or (c) consistent with the Company's legal duty to furnish information.

Keywords: Accenture, Phoenix , FPGA Senior Staff Engineer, Other , Phoenix, Arizona

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